Workshops

Course Instructor:            Phil Zarrow

Course Time:                      8:00 a.m. - 4:30 p.m.

Description of the Course

The SMT Electronics Assembly Class is a practical overview of the many different processes and materials used in through hole and surface mount technologies (SMT). It is a focused two-day long workshop, which provides students with the opportunity to learn and understand the processes, equipment, and materials used in today’s manufacturing of electronic assemblies. It is taught by an experienced and knowledgeable instructor who has worked in a variety of electronics manufacturing-related fields.

Combining a lecture, discussion, and some videos, this electronic assembly basic training workshop was designed to give a very comprehensive and complete “immersion” into SMT and mixed technology PCB assembly. People who are new to the field, as well as somewhat experienced personnel who want to “fill in the gaps,” have found this workshop to be a perfect solution.

As it runs only two days, it is extensive (and non-superfluous) without taking people “out of the shop” for an extended period of time: learn, absorb, and take that knowledge back to the manufacturing floor.

Course Outline
Day One: Introduction – “It’s What We Do”

• PCB Fabrication Overview
  • Circuit Board Fabrication Overview
  • Surface Finish
  • Legend
• SMT Assembly Materials
  • Solder Paste
  • Solder Paste (Flux and Alloy)
  • Solder Paste Characteristics
  • Solder Paste Considerations
  • Adhesives
• Stencil Fabrication and Design
  • Stencil Components
  • Stencil Fabrication and Characteristics (Laser Cut, Electroplating, and Nano-Coating)
  • Fiducials
  • Aperture Design Rules
  • Special Apertures
• SMT Assembly Processes and Equipment
  • Solder Paste Printing and Deposition
  • Solder Paste (Composition and Attributes)
  • Solder Deposition Basics
  • Process Parameters, Control, and Effects
  • Process Considerations
  • Process Defect Recognition and Avoidance
  • Solder Jetting
• Questions and Answers Session

Day Two: Assembly Processes and Equipment 

• Continued
  • Component Placement
  • Machine Types and Characteristics
  • Feeder Types (Attributes and Characteristics)
  • Placement Considerations and Parameters
  • Set-Up and Change-Over
  • Avoiding Placement Defects
  • Line Balancing
  • Reflow Soldering
  • Reflow Profile
  • Reflow Profile Characteristics
  • Reflow Specification Derivation
  • PCBA profile development procedure
  • Thermocouple Location
  • Thermocouple Attachment Methodology
  • Attaining the Specified Profile
  • Reflow Oven types and characteristics
  • Convection Dominant (Forced Convection)
  • Vapor Phase
  • Intrusive (Pin-in-Paste) Reflow
  • Wave Soldering
  • Machine Types
  • Profile Development
  • Process Considerations
  • Selective Soldering
  • Aperture Fixtures
  • Selective Soldering Machine Types
  • Process Considerations
  • Selective Soldering DFM Considerations
  • Profile Development
  • Cleaning
  • Contaminants and Corresponding Solvents
  • Effectiveness of Aqueous Detergents
  • Cleaning Equipment (Batch and In-Line Systems)
  • Cleanability of Components
  • Driving Forces for No Clean
  • Cleaning No Clean
  • Inspection and Testing
  • Testing and Controlling the Process Through SPC
  • Inspection Points and Strategies in the Process
  • SPI
  • AOI
  • X-ray
  • Testing Considerations
• Summary
• Questions and Answers Session

Course Instructor:            Phil Zarrow and/or Jim Hall

Course Time:                      8:00 a.m. - 4:30 p.m.

Description of the Course
This is an important workshop that drives awareness and presents solutions to the adverse impact of non-optimal assembly practices and processes.

A comprehensive perspective on problem issues is developed for the electronic assembly process, including design, materials (both existing and emerging), equipment, procedures, and methods. Most importantly, practical solutions are presented. Key issues that consistently result in assembly problems and low yields are identified and resolved.

Topics Covered

• Introduction and Optimization Objective
  • Definition of “Best Practices”
  • Getting the Most Productivity From an Existing Line (Optimization and Productivity)
  • Process Characterization
  • Inspection and Test Planning

• Best Practices in the Assembly Process
  • Material Handling (PCBs, Solder Paste, and MSDs)
  • Solder Paste Printing Process Best Practices (Stencil Design and Printer Parameters)
  • Component Placement Process Best Practices
  • Reflow Soldering Process Best Practices
  • Wave and Selective Soldering Process Best Practices
  • Conformal Coating Best Practices
  • Design for Manufacturability Considerations (Data Driven Process Design and DOE and SPC)
  • Best Practices Concerning “Challenging Technologies” (QFNs and Ultra-Miniature Components (0201s, 01005s, Ultra-Fine Pitch BGAs and CSPs))

Course Instructor:             Phil Zarrow and Jim Hall

Course Time:                      8:00 a.m. - 2:30 p.m.

SMT Assembly Troubleshooting and Process Optimization - Lessons Learned from the Trenches and a Decade of Board Talk

Description of the Course

In over 30 years of consulting, Phil and Jim have just about seen it all! You may be familiar with their popular podcast (started before podcasts existed), Board Talk, which addresses industry issues with deep understanding and a sense of humor. Join the “Assembly Brothers” for a journey through troubleshooting the most common defects in SMT with an emphasis on identifying the fundamental root causes, and an entertaining overview of SMT assembly process optimization techniques.

Topics Include:

• Why do we get voids in certain solder joints?
• Do we need to clean No-Clean residues before Conformal Coating?
• What is Causing Intermittent BGA Failures?
• Should We Measure Solder Paste Thickness?
• Are there effective countermeasures to “new” defects such as “Graping”, HoP, etc.?
• Should we consider changing to a newer Solder Paste formulation?
• What are the Pros and Cons of Cleaning No-Clean?
• What are potential issues with introducing Ultra-miniature chip components into products?
• Does Your Assembly Line Suffer From Floundering Time?
• How can we reduce tombstoning?
• Can We Skip Cleaning After Rework?
• What are the best practices for storing and handling PCB’s?
• How to build a “proper” profile board to set up a Reflow Oven ?
• How can we achieve adequate hole fill in wave soldering?
• Can we mix conformal coatings during rework?
• Will typical No-Clean residues pass an SIR Test?
• What causes “Icicles” during wave soldering?
• Solder pallets with titanium inserts: yes or no?
• Others

Q & A – “Stump the Chumps”: Jim and Phil answer process questions from participants

Course Instructor:             Mark McMeen

Course Time:                      2:30 p.m. - 4:30 p.m.

How does PCBA Cleanliness and Objective Evidence meet Section 8 of J-STD-001

Description of the Course

Section 8 of J-STD-001 requires contract manufacturers have objective evidence that their PCBA is clean enough and their process for manufacturing achieves a level of cleanliness to meet customer system performance objectives. This presentation is designed to walk one through the requirements and techniques needed to acquire objective evidence to meet Section 8. The goal is to discuss the available analytical tools and process control tools and the latest techniques to acquire the data to build one’s objective evidence book/profile which ensures the cleanliness levels needed to meet your customers’ system-level cleanliness objectives and requirements. Objective evidence is the key output that is needed as proof or evidence that one is meeting the requirement and this presentation will analyze the tools and techniques that provide the objective evidence that is available to contract manufacturers. The tools that will be discussed will be how to create low-cost electrical twins that correlate and represent actual hardware and how to analyze these electrical twin representative test vehicles and how this data output builds the data sets for the required objective evidence. The tools and/or test techniques discussed are SIR testing at 40/90 and 85/85; Ion Chromatography; C-3 testing; Rose Testing and SIR Testing in a thermal cycle environment. Last, we will show how one can correlate their Qualified Manufacturing Process (QMP) using the 168-hour SIR test results to their process control monitoring plan which uses 2-hour testing using a SIR test protocol. This unique correlation allows one to correlate their QMP to their process control monitoring plan to ensure repeatability on a lot-to-lot manufacturing basis.

Course outline:

• Introduction to Section 8 of J-STD-001: Cleanliness
• What is an Electrical Twin Test Vehicle?
• What is a Qualified Manufacturing Process (QMP)
• What is a Process Control Monitoring Plan (PCMP)
• What is Objective Evidence and how does one use the QMP and PCMP to ensure cleanliness
• What tools or techniques provide Objective Evidence?
• Why does SIR data provide a unique electrochemical signature vs other tools and techniques?
• Data from SIR testing at 40/90 and what does it tell us?
• Data from SIR Testing during cyclical temperature cycling and what does it tell us?
• Data from Ion Chromatography
• Data from C-3 testing with and without Ion Chromatography
• Data from Rose Testing and what does it tell us?
• How to use the data acquired to build your objective evidence book
• Questions?

Hands-on demonstration of the latest in SIR test equipment and it data outputs will also be shown during the presentation so those attending can see the latest techniques and electrical twin test vehicles to ensure one knows how clean or dirty printed circuit board assemblies are. What does your objective evidence look like to meet SECTION 8? This 2-hour presentation will show some of the latest developed tools and techniques being used by outside OEMs and CMs to meet their Section 8 requirements.